Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.
Clock gating is an effective method of reducing the dynamic power consumption in synchronous circuits. One of the ways to achieve this is by masking the clock that goes to the idle portion of the ...
While metastability—an indeterminate state in a digital circuit—is far from a new topic, increasingly faster signal rates can put your design at greater disk to the phenomena. Certainly you should ...
Technology developed for driving synchronous FETs in flyback topologies can be directly applied in LLC topologies. This technology offers significant gains in efficiency for applications with low ...
The synchronous buck converter is a widely used topology in low-voltage, high-current applications. One common application is a point-of-load (POL) converter that transforms a system bus voltage of 48 ...
Diodes Incorporated (Diodes) (Nasdaq: DIOD) today introduces the AP61406Q, a new 5.5V, 4A member with I2C interface of its low quiescent current (IQ), automotive-compliant* synchronous buck converters ...
As the quest grows to manage power in everything from the handheld smart phone to sensors for automotive applications and contactless payment cards, designers are getting hungry for new design ...
An asynchronous DSP offers better power, performance, and reliability than one based on standard synchronous logic. It also enables simpler and less expensive PCB and power supplies. Until today, the ...
There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and ...
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