EDN

SOFTWARE TOOLS – ISE Design Suite 12 reduces power up to 30%

San Jose, Calif. – ISE Design Suite 12 software offers design tools that deliver intelligent clock-gating technology to reduce dynamic power consumption by as much as 30 percent. The new suite ...
Design-Reuse

Xilinx ISE Design Suite 12 Enables Up to 30% Dynamic Power Reduction with Intelligent Clock-Gating Technology

AMBA 4 AXI4 IP Support and Innovations in Design Preservation Combined with ISE Power Optimization to Deliver New Levels of Productivity for Virtex-6 and Spartan-6 FPGAs SAN JOSE, Calif., May 3, 2010- ...
Design-Reuse

Major Release of Xilinx ISE Software Slashes FPGA Design Cycles

ISE 9.1i powered by new SmartCompile technology cuts implementation runtimes by up to 6X and delivers 30% faster performance SAN JOSE, Calif., January 15, 2007 – Xilinx, Inc. (NASDAQ: XLNX) today ...